Hi Kranser,
Thanks for sharing the document. It was really helpful in understanding the computational procedure for FFT in FPGA. In that research article FFT is implemented using discrete blocks.
But i would like to use the FFT block given in IP core library. The on chip RAM for cycle IV is small, hence i have to use the external RAM of 32 MB provided in the DE0 nano kit. I looked the FFT block given in the FFT megacore. I went through the IP core documentation for FFT and could understand the purpose of each pin available in the FFT megacore. However, to clearly understand the FFT mega core block, an example project is required .It would be really helpful if there is any FPGA project for FFT in DE0 nano using the external SRAM. Would you be able to provide such a project file, so that i could understand and clarify my doubts ?
Regards,
subash