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Altera_Forum
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11 years ago

fail to compile after assigned the SFP_TX_P1 of SFP+ module (arria V gx dev kit)

I want to use the SFP+ module which converts electric signal to optical signal to transmit some data. I use the arria V gx dev kit. I assigned the data to pin PIN_W37 and select the i/o standa...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

HI

I was facing with the same issue.

i have assigned clk,tx and rx differential pins in the same IO bank in pin planner and IO standard is 1.5V PCML

while compiling its giving error as

Error (175020): Illegal constraint of pin to the region (183, 42) to (183, 42): no valid locations in region

Info (175028): The pin name: FO_RX_P[1]

Error (184016): There were not enough differential input pin locations available (1 location affected)

Info (175029): pin containing PIN_T1

Info (175015): The I/O pad is constrained to the location PIN_T1 due to: User Location Constraints (PIN_T1)

Please help me out