Forum Discussion
Deshi_Intel
Regular Contributor
6 years agoHi,
I am helping Wani as she is out for maternity leave.
Sorry but Intel still grant FA approval yet as the problem statement is not clear to us and I am not sure how you isolate the failure to Stratix IV FPGA device.
- First of all, I can only see you answered half of the questions that Zawani shared with you earlier. Can you respond to remaining questions ?
- The failure description - Timing issue had been detected on Chopin device (volatile FW). MT3T8 Chopin fixing image must not be used in FCT, as it works as screening image, to prevent misbehavior of new MT3T8 deliveries with SW Rel <= Rel 8.0.
- All these statement clearly stated your firmware design encountered timing violation due to wrong image used for production testing.
- This looks to me like your own user error from your factory site.
- May I know how do you isolate this failure to Stratix IV FPGA at all ?
Thanks.
Regards,
dlim