Forum Discussion
24 Replies
- Altera_Forum
Honored Contributor
You can use NEEK's web server design for your reference and port that system to 3C120 dev board. You need to take care of TSE's connections as 3C120 uses marvel's giga bit ethernet phy where as NEEK has national's fast ethernet phy.
- Altera_Forum
Honored Contributor
--- Quote Start --- I would like to use the ethernet on the cyclone 3c120 fpga development board with NiosII and the Niche TCP/IP stack. Anybody has done this already or knows about a quick solution? The CD of this development kit containts only a basic nios2 reference design.. Thanks for help, Christian --- Quote End --- Unfortunately, Altera doesn't have a reference ethernet design for this board, at least yet, but a few of us do have it working. For the FPGA design, PHY pinouts must be defined from the schematic, the RGMII interface hooked up to the MAC, a PLL implemented to create the gtx_clk, and a bit of work done in the auto-generated TimeQuest TSE constraint file. (See this thread http://www.alteraforum.com/forum/showthread.php?t=3040) The only soft MAC supported by the NicheStack is the Altera Triple Speed Ethernet. For the Nios software, simply enable uC/OS and the NicheStack, and select the tse_mac. The tse_mac driver assumes a very specific fpga design, using scatter-gather DMA to interface to the MAC, see chapter 6 of the Triple Speed Ethernet MegaCore user guide. - Altera_Forum
Honored Contributor
Hello,
for those who have experience with this or a similar design: What true bandwidth can be achieved with this design on a GbE link? Where is the bottleneck? Regards, Leon. - Altera_Forum
Honored Contributor
The bottleneck is the Nios processor. I talk about it on the nios forum (http://forum.niosforum.com/forum/index.php?showtopic=8751). The fastest rate I got on udp trafic with the cyclone III on the dev board was about 50Mbits/s using the Interniche TCP/IP stack and 160Mbits/s using direct calls to the ethernet driver.
- Altera_Forum
Honored Contributor
You can also use the Avalon OpenCores 10/100 ethernet MAC. There is a full driver written for the InterNiche Stack that supports uCOSII and superloop modes of the stack.
The Avalon OpenCores MAC uses less resources than the Altera TSE MAC and there are no hard-coded device names in the driver that you need to worry about. There is a pretty good document explaining how to instantiate the MAC and get it up and running. You can obtain the MAC and the driver from the NIOS forum: http://forum.niosforum.com/forum/index.php?showtopic=8287 The driver should work equally well for the regular OpenCores MAC should you decide to use it. I have not used the 3C120 board but I have gotten both the OpenCores and TSE MAC running on the NEEK. Jake - Altera_Forum
Honored Contributor
Good afternoon.
I have a question about ethernet on the board of Cyclone III 3c120. Are there any examples for CIII (i can't find it anywhere) or we can use the example for CII? - Altera_Forum
Honored Contributor
There is no design example available and I think there will never be. You can't use the CII example because it uses a different chip. Altera really screwed up on the CIII kit, less than half the board is actually usable straight out of the box.
I made a design a while ago on that kit with an Ethernet connection, but it had some restrictions (Gigabit only, need to modify the ipport.h file, etc...). I posted it a while ago on the Nios forum but can't find it now. I'll see if I can find it again. - Altera_Forum
Honored Contributor
I believe the designs for Simple Socket Server Plus, on the Nios Wiki, make use of the TSE and onboard 10/100/1000 port.
http://www.nioswiki.com/exampledesigns/simplesocketserverplus Cheers, - Brendan - Altera_Forum
Honored Contributor
Oh true. I'll bookmark this one!
- Altera_Forum
Honored Contributor
Unfortunately, i couldn't create the project 20090508a_nios2_linux_3c120_125mhz.tar.gz (http://www.nioswiki.com/@api/deki/files/265/=20090508a_nios2_linux_3c120_125mhz.tar.gz) under the Quartus 9.0 SP1, maybe the problem is Win Vista.
But I have found the example for CIII it is cycloneIII_3c120_embedded_v8.1.0_CDROM.zip about 58 Mb and you can download it from the altera.com. i have succesfully compiled it under Sopc Builder 9.0 and Nios II IDE 9.0 SP1. So now i can't understand if there is enough the symbol file of Nios with pins to launch the example on the dev board, if anybody can tell me?