Honored Contributor
Honored ContributorI really can't see any other reason than problems on the clock or reset...
Did you see that reset is active high this time? You need to put it to 1 to reset the core, and then to 0 to use it. Are you waiting long enough? I just had a look at the test bench, and it waits 1000 ns after the reset before doing anything. If you attempt write just after the reset, the TSE core could take a long time to respond, while it is accomplishing the reset. Oh no wait, I just remember another problem I ran into. The address register map in the datasheet is misleading when you use the TSE core outside of a NIOS processor. It is giving the addresses as seen by a CPU in an 8-bit space, but the hardware address bus selects a register in the 32-bit space. This means that when you address the component yourself, you need to divide the address by four. i.e. supply "00000010" on the address bus to access the config register. You were in fact trying to write to the rx_section_full register, which could block the component if no valid clock is present on the ff_rx_clk signal. This problem kept me stuck for a long time ;) Hope this helps
