--- Quote Start ---
...directly access the
nios' memory --- Quote End ---
I think the size of the Nios' memory is about 4 MBit. So I guess it's not the same as the
ddr2-sdram on the Board...
For my project, I think I am going to use Ethernet (with NIOS). My VHDL-Hardware will fill the DDR2-SDRAM with Data (received from ADC). Then the NIOS should read the DDR2-SDRAM and send the Data via Ethernet to the PC. I will take care of the speed of Ethernet
later, at first I am glad if it works at all...
In this case, my hardware and software are independent in a way. Could there be problems when the FPGA and the NIOS both access the DDR2-SDRAM?
Thank you, Daixiwen! :)
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