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ywang161's avatar
ywang161
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7 years ago

Error (18108): Can't place multiple pins assigned to pin location Pin_XXX in Quartus 18.1.2 for a partial reconfig design

Hello, I met this error while trying to fitter my partial reconfig design with Quartus: Error (18108): Can't place multiple pins assigned to pin location Pin_AV25 (IOPAD_X233_Y12_N61) Info (18...
sstrell's avatar
sstrell
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6 years ago

I tried this in 19.1 and see the same thing.

However, I found this: https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/rd02162015_537.html

The article is old and doesn't specifically call out Stratix 10, but it does call out Arria 10, which uses a similar PR mechanism. My guess right now is that if you're using PR, these pins can't be dual purpose because they must be always available for the incoming PR bitstream.

Hopefully YY can confirm.

#iwork4intel

ywang161's avatar
ywang161
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6 years ago

Thank you for your help!

Yes maybe the article explains the error we met in the PR design, although we don't need these dual purpose pins for receiving PR bitstream in an internal host PR. As this article didn't precise if this pin assignment limitation is for internal host PR or external host PR, maybe it meant both kinds of PR.

However, in the response that we've posted yesterday, we've uploaded a root_partition_issue testcase. In this design we are trying to use root reuse design flow, without PR or any runtime reconfig, and we got the same error. This is confusing to us.

regards.