Enabling Ethernet via QSFP or SFP+ on Agilex™ 5 FPGA E-Series 065B Premium Development Kit

Hi Jingyang Teh,

Thank you very much! We are trying out these recommendations.

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We also found the following links. Would appreciate any comments/inputs regarding either of the approach's feasibility, for our immediate need.

1) Agilex™ 5E HPS Enhanced System Example Design Architecture

https://altera-fpga.github.io/rel-25.1.1/embedded-designs/agilex-5/e-series/premium/egsrd/ug-ehps-agx5e-premium/#agilextm-5e-hps-enhanced-system-example-design-architecture

Could you please indicate what HIP or SIP it uses. In the diagram it says "he_hssi". But it seems like this an Agilex 7 IP, would it work on Agilex 5? Secondly, what Linux driver it uses on HPS side. While we plan to try out this example design, thought I would ask in case you have more information readily available.

2) Reading all the documentation on different options, it seems like using "GTS Ethernet Intel® FPGA Hard IP" is a great option for our use-case. Could you please point to any documentation or resource on the appropriate HPS Linux driver that we can use to connect with this HIP?

https://www.intel.com/content/www/us/en/docs/programmable/817676/25-1/overview-18220.html

Thank you!

KBS