driving seven segment user display

Your 1:4 multiplex method seems basically correct. Typically, a kHz multiplex frequency would be used, generated by a synchronous counter. To achieve equal brightness of the minus sign, the duty cyle must be reduced. Unfortunately, the segment lines are driven from a 1.8V VCCIO without decreasing the current limiting resistors (could be considered a design flaw, to my opinion). Generally, for acceptable brightness, digit drivers with higher current capability than FPGA IOs would be needed.