SB_S
New Contributor
6 years agoDRAM Memory Interface
To interface the DRAM , we need to use 2J , 2K IO bank.
We have x16 support , so can we configure the unused pins of 2J and 2K bank as GPIOs ?
To interface the DRAM , we need to use 2J , 2K IO bank.
We have x16 support , so can we configure the unused pins of 2J and 2K bank as GPIOs ?
Hi,
Yes, we can configure unused pins as GPIO.
Which FPGA(P/N) are you using?Refer pin connection guideline from below link
https://www.intel.com/content/www/us/en/programmable/documentation/lit-dpcg.html
Regards
Anand
We are using Arria 10 SX series . so there we wil be using only 16 data bits. rest of the data bits can be used as GPIOs ?
Only shared IO bank and dedicated bank pin can be used as GPIO pin.
check Arria 10 Hard Processor System Pin Information.