Forum Discussion
Altera_Forum
Honored Contributor
16 years agoit looks like the sof file isn't the correct one.
When you compile your software, the .ptf file from the SOPC system is read to get the hardware configuration (address and interrupt map, devices...). It is very important that the sof file that you upload to the FPGA is compiled with the same hardware description. The error message that you have says that they don't match. Try to recompile both the Quartus project and the software, and see if you still have the problem. Check also that the software compilation uses the correct .ptf file.