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Chloé_Russell's avatar
Chloé_Russell
Icon for New Contributor rankNew Contributor
7 years ago

Does the logic inside flash memory devices require a power down after each WRITE operation?

Hello, After WRITE operations (program or erase sector) to the Flash Memory, it does not respond to any instruction during power-up except READ STATUS REGISTER, I have reset the circuit and the dev...
AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

  1. The status register can be read continuously and at anytime, including during a write or erase operations.
  2. The EPCS/EPCQ/EPCAL device is a flash memory device that can store configuration data that we use for FPGA configuration purpose after power cycle.
  3. If the read bytes operation is shifted in while a write or erase cycle is in progress, the operation is not executed and does not affect the write or erase cycle in progress.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand