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prabhu1
New Contributor
New ContributorDifferential LVDS output clock voltage level settings
Hi, I am doing this test on development board : cycloneVE_5cefa7f31_fpga_v12_1_1_0 Pins _HSMC_TX_D_P0, HSMC_TX_D_N0 in bank 4( power 2_5v) are used and they are defined as LVDS (output). I am u...
FvM
Super Contributor
Super ContributorHi,
simple fault, LVDS output needs 100 ohm differential termination to see nominal level of 340 mV.
simple fault, LVDS output needs 100 ohm differential termination to see nominal level of 340 mV.
