deo nano cyclone 4 E board user manual example

--- Quote Start ---

Is your project also called simple_counter? If yes then your top level file will be called simple_counter by default, and it cant instantiate a component with the exact same name. You can either create a new block design file called for example simple_counter_top, then with a right click make it the top level file, and then instantiate your simple_counter block from there, or call your verilog file something else (for example simple_counter_component.v)

--- Quote End ---

Thank you

Martin