ASidd16
New Contributor
5 years agoDebugging DE10-lite with external 10 Pin Blster
Hello Everyone,
I want to debug DE10-lite with extenal JTAG header but it only shows MAX II(EPM240) device when i scan it for downloading a file.
Can anyone please guide me what is the problem and how can i approach to my MAX 10 FPGA except MAX II CPLD.
In schematic the external JTAG header connector is connected to MAX II EPM240 then it's connected to MAX10 FPGA JTAG pins.
The data sheet and schematics:
https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=218&No=1021&PartNo=4
Thank you very much