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Honored ContributorDE2i-150 | SSRAM Memory | Memory tests Fails
Hello All, I am trying to do a prototype for my new board on DE2i-150 eval board. Where I would like to run an application from SSRAM memory. I am trying to use the reference design "DE2i...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I couldn't able to find any timing constrains are given for SSRAM interface. --- Quote End --- That is unfortunate. Poor examples teach bad habits. No example design should be provided without good timing constraints. --- Quote Start --- Let me try to use PLL clk for SSRAM module and given some constrains for the interface. I will update you my results asap. --- Quote End --- That should be sufficient to get things working. If you need an example of an .SDC file, I created one for the Altera SDRAM controller in this DE0-nano example ... http://www.alteraforum.com/forum/showthread.php?t=45927 Cheers, Dave
