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Altera_Forum
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17 years ago

DE2 SRAM Flash & Tristate Bridges

Hi, in the example DE2 designs for NIOSII SOPC systems, the SRAM is connected directly to the Avalon Bus while the Flash is connected via a tristate bridge. What is the reason for that? In th...
Altera_Forum's avatar
Altera_Forum
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17 years ago

So who is doing the tristate work? It must be either the Nios system or somewhere in the fpga. Else it can't be done.

For any bidirectional pin you must have a tristate arrangement to cutoff your output drive when reading the input. Sopc does it for you plus some extras e.g. address mode transfers.