DE2-70 with D5M Camera

Ok then, u do not understand what I mean right. Instead of using 1 sdram in the de2-70 board, the original code is used 2 sdram. If i'm not mistaken, the sdram controller assign as u8 and u9. FYI, the original code is used 2 sdram to be able read and write in 32 bits per cycle. So, if u want to convert the code by only using 1 sdram, u have to create new fifo controller with 30 bits in/out to be able load by vga. The clock for the buffer u create must be twice vga_ctrl_clk. Load 2 times to buffer from sdram then load by vga 1 times. If not, u wont be able to load 30 bits data to vga.