Forum Discussion
Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- Is it really possible to damage this boards with wrong configuration? --- Quote End --- It is ABSOLUTELY possible. --- Quote Start --- If you have signals contention, and the board designer was experienced so you shouldn't worry about board damage :) --- Quote End --- These boards are "evaluation" boards. The designers assume you know how to read a schematic, and will not do anything to damage the I/O. --- Quote Start --- This is like saying - if you use your PC computer with wrong SW you can burn your PC, I hope this is not possible in this board --- Quote End --- There is very little protection on these boards. If you create a driver conflict, or use an invalid logic level (5V on a 3.3V pin) you will damage the board. --- Quote Start --- I have TCL file of the DE2-115, I have used your script, but change the "proc get_pin_constraints {arg} {" to my board, I guess this is not enough - because the pins name might be different in the VHDL code you used - is this correct? --- Quote End --- That is right. You have to have matching pin assignment constraints and top-level HDL pin names. Review the .pin file generated by Quartus until things match. --- Quote Start --- I have attached the updated TCL for DE2-115 --- Quote End --- You're on the right track. Now you have to make sure your top-level HDL names match and check the .pin file. Cheers, Dave