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While reading your PDF, I have more question:
When you write:
"The Virtual instruction register bus from the Virtual JTAG component was connected to GPIO
bits and to the LEDs (so that Tcl commands can change the LED state)."
This means that I have manually to connect the Virtual Jtag myself to LEDS ?
I guess you mean ir_out[2..0] ?
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Yeah. Instantiate an SLD_Virtual_JTAG component and a SignalTap II instance. Probe the ir_out[] bus and you'll see that it captures your custom instruction LSBs.
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Also I did not understand how to change Directions - meaning the TDI generally is output of Altera, and just in JTAG mode turns to input? so how should I turn it to input?
Also in the timing diagram you mark TDI-ERROR (what would you expect there?)
When it is in JTAG mode - by TCL commands, this block get automatically clocks and data? (so I don't have to take care about toggling these pins correct?)
So if I have connected my leds correct and gave TCL commands I should see the leds lighting by my input to ir_in[2..0]?
Thanks for your help,
When my blocks are ready I will share them to all here
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I'll dig up my example code and post it. It'll be much easier for you to use a working example.
Cheers,
Dave
Honored Contributor
