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richard6's avatar
richard6
Icon for New Contributor rankNew Contributor
5 years ago

DE10-Nano | Unable to use UART (Platform Designer)

The attached pictures describe my test design where I try to setup a UART link between the NIOS II and my laptop. The UART core signals are exported to the top-level design, where they are routed...
EricMunYew_C_Intel's avatar
EricMunYew_C_Intel
Icon for Frequent Contributor rankFrequent Contributor
4 years ago

Can you try loopback two UARTs within your FPGA and check if they work.