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Altera_Forum
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11 years ago

DE1-SoC FPGA Configuration from HPS Failure

Page 11, Table 3-2, of the Terasic DE1-SoC User manual states:- MSEL[4..0] = 01010 = FPPx32 = FPGA configured from HPS software: Linux. However when I try to convert the .sof file into .rb...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

This was all my own silly fault :oops:

The MSEL settings of 01010 recommended by Terasic actually correspond to switch settings of 10101, the bits are inverted AND swapped left to right as you look at the switches.

The command

dd if=./output_file.rbf of=/dev/fpga0

subsequently works just fine. I can configure the FPGA from Linux after boot!

Now I can start coding :)

For the record the best workflow appears to be to get Quartus to generate the rbf when compiling rather than converting it afterwards (The FPPx8/16/32 settings in Convert Programming Files all helped to add to the confusion).

In Quartus FPP settings of FPPx8/FPPx16/FPPx32 do not alter the file produced. Compression does alter the file produced, but interestingly MSEL settings of 00010 and 00110 (FPPx16, compression on) will actually work with an uncompressed file. Conversely MSEL settings 01010 and 01110 (FPPx32, compression on) WILL NOT load an uncompressed file.