Altera_ForumHonored Contributor9 years agode0-Nano SPI slave implementation VHDL Hi all, I just got hold of a DE0-Nano board. I'm trying to implement a very simple SPI (nano as slave). At the moment I just want to be able to continuously latch in a value, and then read it b...Show More
Altera_ForumHonored Contributor9 years agoThink I've found the problem now, I'll upload the solution when I have it.
Recent DiscussionsSlow Runtime Performance in FIL Implementation on DE2-115 Using EthernetAgilex5 HPS2FPGA usageDevice stopped receiving config data: Internal error (0x0000, 0x00000000, 0x1800).Mandelbrot viewer on Cyclone V - Platform Designer layoutStratix 10 GX SI Board - issue with the Board Test System (BTS)