Forum Discussion
Altera_Forum
Honored Contributor
15 years agoSimply consider, that any top design port signal is implemented as I/O pin. I didn't think yet about if it's absolutely necessary, I'm just used to it. Furthermore, Quartus has the option of defining virtual pins that are ignored in I/O assignment, but I fear it may be unavailable in the free Quartus Web edition. I don't use schematic designs, so I can't say if they have a means to specify virtual pins.