DE-2 5V tolerance

DE-2 has 47 ohm series sersistors and BAT54 schottky clamps at all GPIO pins. They basically provide a safe voltage limitation, if operating it from 5 V logic. Considering the voltage drop at the driver, the current would be limited to about 20 mA for each pin. Two problems should be considererd, however:

- Driving many inputs to 5V with an idle FPGA could possibly raise the 3.3V supply voltage to an dangerous level.

- With an octal driver chip, the maximum VCC current could be exceeded

A simple solution would be to use additional series resistors with slow or medium speed signals.