LLian22New Contributor6 years agoDDR4 interface signal test abnormal Hi: During the test of the DDR4 controller, we found that the data write DQ signal was abnormal, but the timing of the data read was normal and the data read was correct. The cause of the abnormal d...Show More
BoonT_IntelFrequent Contributor6 years agoBy the way, when you measure the waveform, is it during calibration or read/write stage?
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