Forum Discussion
LLian22
New Contributor
6 years agoDDR4 interface signal test abnormal
Hi: During the test of the DDR4 controller, we found that the data write DQ signal was abnormal, but the timing of the data read was normal and the data read was correct. The cause of the abnormal d...
BoonT_Intel
Frequent Contributor
6 years agoBy the way, when you measure the waveform, is it during calibration or read/write stage?