Forum Discussion
XNguy4
New Contributor
6 years agoDDR4 HILO in S10MX failed initialization
I am using the qts_hilo_ddr4_x72_1066MHz sample project to test the DDR4 HILO in the Stratix 10 MX development kit. I didn't change anything, except upgrading the project from Quartus 18.1 to Quartus...
NurAida_A_Intel
Frequent Contributor
6 years agoHi,
Thank you for joining this Intel Community.
When you run project from Quartus 18.1, do you facing similar issue?
Can you please check on the PLL signal? I suspect the PLL loses lock and this will assert the reset signal until the PLL is locked. The reset signal need to de-assert in order for the controller being enable. Kindly, please check on this two signals.
At the meantime, I will recommend you go through the calibration checklist. See if there any item that list in calibration checklist is suspect as the failure’s root cause.
https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/devices/cfg-index/calibration-checklist.html
Hope this helps. Let me know your feedback.
Thanks
Regards,
Aida