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AMa's avatar
AMa
Icon for New Contributor rankNew Contributor
6 years ago

DDR4 校准不过

Hi 我们客户用了8片DDR4，分为两组，每组64bit。 布线前，分配IO检查过，fitter能跑过。 现在问题是，上电后，local_cal_fail拉高，校准不过。 我检查过时钟，给的100M 参考，与IP内对应，电源1.2V与0.6V的参考都是ok的。 上电后，IP的emif_usr_clk能正常出来，说明参考时钟正常进去了，然后时钟出来了？ 我也试过降频测试，从1200M降...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi,

Good day to you. 😊

May I know which stage it is failing on the EMIF Toolkit? Is it a consistent group's failure or intermittent ?

At the meantime, you can go through the “Check list for troubleshooting calibration failure” that available in link below and see which item might be applicable in your case.

Calibration Checklist: https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/devices/cfg-index/calibration-checklist.html

I also suggest you to generate DDR4 example design, with same device and all the memory setting and see if the calibration pass/fail. This will help to isolate further as below:

  • If it passed, then you know that issue is possibly related to board issue or any other build issue.
  • If it failed, then highly it’s DDR4 interface issue.

Let me know your feedback.

Thanks

Regards,

Aida