Altera_Forum
Honored Contributor
Honored ContributorDDR3 Timimg requirements
Hi,
What changes should be done to meet DDR3 Timing requirements if I am migrating my project from use of EP2AGX125EF35c4 as FPGA to EP2AGX125EF35i5 as FPGA ?Honored ContributorHi,
What changes should be done to meet DDR3 Timing requirements if I am migrating my project from use of EP2AGX125EF35c4 as FPGA to EP2AGX125EF35i5 as FPGA ?
