DDR2-SDRAM on Cyclone III DSP Kit (no NIOS)

Hey immutableman, thanks for your help! :)

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Can you post a screen shot of the simulation including all the memory port signals?

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Well, I didn't do any simulation.

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If you mean ... How do you do it, then ... I am assuming you have an HDL design...

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I have a block design file and there I use some blocks which I created with VHDL. And I just want to read from and write to the DDR2-SDRAM using this Megafunction called "ddr2-sdram high performance controller".