Data width of DDR SDRAM in Nios II stratix II edition

The physical interface is 16 bits wide so on the Avalon-MM side it'll look like a 32 bit memory (due to the double data rate). Depending on the burst length you set for the DDR SDRAM you'll get the following Avalon-MM burst lengths:

DDR burst length = 2 --> Avalon-MM burst length of 1 (i.e. non-bursting)

DDR burst length = 4 --> Avalon-MM burst length of 2

DDR burst length = 8 --> Avalon-MM burst length of 4

The reason for the burst length being cut in half is that half of the burst is consumed by the double data rate (a burst of 2 makes up the rising and falling edge of the clock of data transfer).

If you want to see an example of a design using it go into the EDS folder and under there should be an examples folder with some designs for each embedded development kit (sorry I don't have the tools installed on this machine so I'm going by memory).