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Altera_Forum
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11 years ago

Data from FPGA to host

Hi, I have a DE0-nano board and I compute data (only 4 bits generated at about 10MHz) and I'd like to communicate it to the host cpu through the USB-blaster so programs could read it. I've read th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Here is my problem of the day:

I'm using SignalTap II with three signal. The first one is acting as the clock and the others are represented on this image:

https://www.alteraforum.com/forum/attachment.php?attachmentid=10256

ext_s0 is acting as the trigger on either edge so I would think it's constant before 0 but it's not. Can you explain?