cycloneIII any tutorial how to drive lcd

Mr FvM, Your answers are very helpful. A helping hand makes a happy heart.

Next question, on the Cyclone III development kit board, the Nios is stated as Soft IP. So when I send a signal from the HDL code part to the Nios,

i.) can both the HDL part and the Nios part be programmed into the same FPGA together?

ii.) In what form does the output from HDL part call the Nios part?

iii.) Is it right that if the Nios is an embedded processor like the one in a Nios Dev Kit (unike the cyclone III I have), then the HDL part will be programmed into the FPGA but the C+ part will reside in the processor.

Thank You.