Forum Discussion
Jodok
New Contributor
2 years agoCyclone V TSE MAC timing closure
I try to synthesize a tripple speed ethernet (TSE) MAC with rgmii on 5CGTFD9E5F31l7 and encounter timing missmatches. The PHY is a DP83867IR and a TXV0106 level-shifter (+/- 0.3ns skew) is inbetween...
RichardT_altera
Super Contributor
1 year agoWe noticed that we haven't received a response from you regarding the latest previous question/reply/answer, and will now transitioning your inquiry to our community support. We apologize for any inconvenience this may cause and we appreciate your understanding.
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