Forum Discussion
Altera_Forum
Honored Contributor
9 years agoHello Amna Tarheem,
With your board a resource CD is supplied. You can download this CD aslo from the terrasic website. On the CD there is a tool called system builder. I downloaded the CD to look at it and found in in the following directory; C:\Users\jogi\Downloads\SoCKit_v.3.0.0_SystemCD.zip\Tools\SystemBuilder The systembuilder is used to generate a project framework automatically with the Pin assignments you need. When you start Systembuilder you can select the I/O devices you want to include in your project. Just check the boxes of the i/o's you want and press generate. Then you can open the generated project framework in quartus. (open the qpf file) Once you have opened this file you can access all I/O's for the FPGA by adding them as an i/o parameter to your main VHDL/Verilog file in your project. You can see details of the pin/io assignments in pin planner in quartus (menu: assgiments / pin planner) There you see in column "node name" the name you need to use in your project.library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ent_main is
port(
-- reset button:
reset_n : in std_logic;
-- leds on board:
led: out std_logic_vector(3 downto 0); ... Best Regards, Johi.matif
Occasional Contributor
6 years agoHi, Johi
Just one more comment on what you said. Are you able to add HPS with the help of system builder. I have system builder V1.0.0 but in that version you are not able to select HPS. Will the pin assignments remain the same if I change the version number of system builder because V1.0.0 corresponds to revision C of sockit board but the version that you are using corresponds to revision F of sockit board,