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Chandrashekhar_K's avatar
Chandrashekhar_K
Icon for New Contributor rankNew Contributor
2 years ago

Cyclone V SoC DDR3 Not working

On custom board we are trying to make the DDR3 up. I'm trying to debug the preloader and check the DDR3 working. Have generated handoff files from Quartus prime. Compiled using BSP editor setting...
Fpga Devkit
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


I'm glad to hear that your issue has been resolved.


For your follow up questions, you may create another thread to get some clarification from the Intel experts because I'm not familiar with the booting FPGA side.

I'm fine to kept this thread open for DDR related question.

Otherwise I will leave this thread to community users to help you on this thread.


Regards,

Adzim