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SSmit7's avatar
SSmit7
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5 years ago

Cyclone V GT board test system not functional

Hello I have been trying to get the basic board test system up and running for the Cyclone V GT development kit. I am running it on Quartus 13.0.1 (service pack 1). I can connect to the board via ...
AR_A_Intel's avatar
AR_A_Intel
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5 years ago

Hi

Thanks for update. But before setting up BTS, would you kindly help check whether your machine is supported or not (OS) by referring to link below: https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/os-support.html#Table2

An unsupported platform means that some things may work, but others not, and we won't put any resources into debugging or diagnosing. We strongly recommended to use the right OS as it was tested.

2. Could you attach again the error screenshot?

Thanks


  • SSmit7's avatar
    SSmit7
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hello

    I am using Quartus version 13.0 SP1 with the dev board. The board test software doesn't seem to work with a later version of Quartus that I tried (17.1). The system requirements for Quartus version 13.0 SP1 are as follows (from the Quartus readme.txt file):

    "System Requirements
    ===================
    Operating system support
    ------------------------
    * Windows 7 (64 and 32 bit)
    * Windows XP SP2 (64 and 32 bit)
    * Windows XP Pro X64 Edition
    * Windows Server 2008 R2 (64 bit)
    * Red Hat Enterprise Linux 6 (64 bit)
    * Red Hat Enterprise Linux 5 (64 and 32 bit)"

    I am using Windows 7 SP 1 64 bit. I believe that this means that it should work, surely, according to the system requirements?

    • SSmit7's avatar
      SSmit7
      Icon for New Contributor rankNew Contributor
      5 years ago

      Here are the error screenshots again, as requested.

      • AR_A_Intel's avatar
        AR_A_Intel
        Icon for Super Contributor rankSuper Contributor
        5 years ago

        Hi

        Done checking with teammate, for Image A – No BoardTestSystem-compatible design exists in FPGA

        • This looks like you didn’t select the default BTS design?

        Could you help check? Did you select and load the BTS example design from BTS software?

        • And may I know, have you change/program the default Max V pof design? For instance : Reprogram the Max V with your own design