Forum Discussion
Altera_Forum
Honored Contributor
12 years agoI am seeing a similar problem with the Cyclone V GT demo board, annoyingly on the GT demo board you have to have the MAX V CPLD system controller in the JTAG chain with the FPGA which is not like the GX demo board.
When I scan the JTAG chain it automatically detects the FPGA and CPLD correctly but when I try and load a sof in the FPGA and bypass the CPLD it fails. Does anyone know how to resolve this one?