CYCLONE V - HPS and I2C Pins on DE1-SoC Board

Thank you

I've made some steps toward the solution:
I write here to help some others:

INITIALIZATION:

1: Disable Controller 0x6C <-- 0

2: Configure Controller to be a MASTER, set lenght to 7 bit, freq 100kH 0x00 <--63

3: Setting Target Address 0x04 <-- I2C address (for MPU6050 = 68)

4: Enable Controller 0x6C <-- 1

WRITE on register 0xXY the data 0xPQ

1: Write Slave address and Register address on I2C WITHOUT releasing bus (NO send STOP) 0x10 <-- 0xXY

2: Write Data: 0x10 <-- 0xPQ

3: you can continue writing the data for reg. (XY+1) , (XY+2) ....

4: to release the bus 0x10 <--0x2PQ (Write data and generate STOP)

READ on register 0XY

1: Write Slave address and Register address on I2C WITHOUT releasing bus (NO send STOP) 0x10 <-- 0xXY

2: Read Data and generate a STOP 0x10 <-- 3ZZ

Please note that the signals generate (on the oscilloscope) seams compatible with the protocol and the data
But data read on the Driver Registers are still instable and quasi-Random.