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TerraX
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3 years agoOne idea I have about this error message is that the Clock pin I'm using for the PLL (CLOCK_50_B7A on Bank 7) is on a separate bank from the Tx & Rx pins (which are on bank GXB_L0). If that is the case, then I only have REFCLK_p0 to work with as the input to the PLL since it is on the same bank as the Rx & Tx pins I am trying to connect together. Does that sound about right?