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Yes, with "shunt" I mean connecting it.
With Pin planner you can configure the FPGA to use a certain I/O standard internally, but J3 selects the actual I/O voltage (VCCIO) given to the banks 5 and 6. Check the schematics ...
Our HSMC daughter board and C4GX DevKit host board survived. The problem was found when an output signal from C4GX to HSMC daughter board was unoperational and was examined. It could be that we didn't have any 2.5V lines fed into C4GX's 1.8V I/O pins at that moment ...
As FvM mentioned, 12V could cause "smoking" more likely than 1.8V vs. 2.5V difference.
Note that there actually is a direct connection between HSMC and MAX II: HSMA_PSNTn and HSMB_PSNTn. Have you checked those lines ...
Jari
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thanks for reminding. I didnt really put my attention on HSMA_PSNTn signal before this. I was keep on focusing on the IO signal.
Currently checking the schematic for HSMA_PSNTn. However, I dont really understand how is the connnection should be. In the C4GX dev kit schematic, it shows that HSMA_PSNTn signal from the HSMC connector interface is connecting to MAXII (pin G5), C4GX (pin A25), and also connecting from 3.3V with green LED (D1) and resistor (R1).
Thus, may you advice how your daughter card connecting this HSMA_PSNTn pin? Did you connect it to GND at daughter card or supply what voltage signal?
Mind to explain how does this HSMA_PSNTn signal functions? because I dont understand its flow.
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Sorry to be blunt but I don't care what you escaped without destroying before you broke the CIVGX.
The Cyclone IV data sheet in I/O Stardard Specifications, Table 1-15 in the version I have, says VinHigh Max for a 2.5V IO is Vcc+0.3V, ie 2.8V.
If you're driving anything higher in you're asking for trouble (unless you add properly calculated current limiting resistors).
There isn't enough detail in that to diagnose the problem, try to get hold of the schematics and trace all the HSMC connections.
Nial
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Thank you.
As you advice, I am trying to troubleshoot from the schematics to trace the HSMC connections right now.
But I dont understand how the HSMA_PSNTn signal is being drive. It is driven by 3.3V and it is also connecting to MAXII and FPGA and to the daughter card. So at my daughter card, should I drive the HSMA_PSNTn pin to GND or supply it with what voltage value?
Advice are very much appreciated.
Honored Contributor
