Honored Contributor
Honored ContributorYes, with "shunt" I mean connecting it.
With Pin planner you can configure the FPGA to use a certain I/O standard internally, but J3 selects the actual I/O voltage (VCCIO) given to the banks 5 and 6. Check the schematics ... Our HSMC daughter board and C4GX DevKit host board survived. The problem was found when an output signal from C4GX to HSMC daughter board was unoperational and was examined. It could be that we didn't have any 2.5V lines fed into C4GX's 1.8V I/O pins at that moment ... As FvM mentioned, 12V could cause "smoking" more likely than 1.8V vs. 2.5V difference. Note that there actually is a direct connection between HSMC and MAX II: HSMA_PSNTn and HSMB_PSNTn. Have you checked those lines ... Jari
