--- Quote Start ---
The DDR SDRAM is only 13 bit address, but the SOPC SDRAM controller altmemddr has 26 bit address (0x02000000-0x03ffffff), how the 13 bit address is mapping to 26 bit address to connect to Avalon switch fabric?
--- Quote End ---
The SDRAM on the Cyclone III Starter kit is 256 Mbit = 32 MByte. To address 32 MByte as bytes, you need 25 bits.
0x02000000-0x03ffffff is a range of 0x01ffffff which is actually 25 bits.
The reason there are only 13 address lines is the because the addressing of SDRAM is actually split up into a matrix of row address and column address with multiple banks. The row address and column address are sent at separate times over the same address lines.
The memory on the starter kit uses 13 row address bits, 9 column address bits and 2 bank address bits for a total of 24 bits. The output is 16 bits wide. 2^24 * 16 = 256Mbit.
None of this actually solves your problem, but it should help you understand a bit more how the system should work.
Honored Contributor
