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18 years ago

Cyclone III Development board errata

Hello everyone,

I've designed a new system from scratch on the cyclone iii development board (http://www.altera.com/products/devkits/altera/kit-cyc3.html) and I found a few errors in the files provided by Altera. I don't think I've seen them before on the forum, so I thought I would share them with you, so that you don't loose as much time as me to find them out ;)

SRAM pins

4 pin assignments on the flash/sram data bus are wrong, on the "cycloneIII_3c120_dev_my_first_fpga", "cycloneIII_3c120_dev_niosII_standard" and "cycloneIII_3c120_dev_quartus_pinouts" design examples. 2 of these pins are connected to ground, which makes it somewhat difficult to write what you want in the SRAM. Only the upper word is concerned, so the flash (that only uses the lower word) is not affected. You must change the following assignments:

fsd PIN_C8 -> PIN_B8
fsd PIN_D9 -> PIN_C8
fsd PIN_F11 -> PIN_D9
fsd PIN_F10 -> PIN_E7

The second error is in the reference manual, page 2-39. It says that the chip select pins for both the character and the graphical LCDs are connected to pin AB24. The chip enable for the text LCD is in fact connected to pin AC24. The example designs are correct though.

On a personal note I found the name they gave the LCD pins very confusing, because it is impossible to tell which signals are common to the two LCD displays, and which are specific to one of them. I renamed the signals to something like lcd_txt_*, lcd_gr_* and kept only the names lcd_* for common signals.

Is there a way to tell this to Altera so that they can correct all this for the next version?

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