Cyclone III development board and USB FT245BL

To access Altera FPGA and CPLD through JTAG, yo have basically two options:

- Use third party JTAG tools. All production related actions (programming of CPLD, test by boundary scan can be done by industry standard protocols and are basically documented. Development related actions, e. g. download of temporary JTAG configurations from *.sof files is using proprietary JTAG instructions, but documented as well. The Virtual JTAG protocol involved with most communication between tools and FPGA has been recently documented in virtual JTAG MegaFunction manual, the specific application protocols, e. g. for SignalTap II or In-System Memory Editor are undisclosed, but more or less simple.

- Use Altera JTAG programming hardware through Altera software stack. Only part of the existing interfaces respectively access pathes has been yet documented, particularly access of virtual JTAG through tcl commands and a JTAG UART interface.

If you understand the USB Blaster protocol, you can also combine both methods, perform generic JTAG through USB Blaster. It may be interesting for accessing other vendors devices in the JTAG chain or boundary scan tests of Altera devices through an existing USB Blaster.