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Altera_Forum
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17 years ago

Cyclone III development board and USB FT245BL

Hi, I currently develop with the cyclone III development board (EP3C120N). The board features two USB chips. The Cypress chip is used for the byteblaster logic and as I understand the documenta...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

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The latency timer affects only small transfers, less than 64 bytes. As soon as the 64 bytes buffer is filled, then the timer is not relelvant.

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I'm not really sure of this. I think the latency is there anyway, even sending/receiving bigger blocks. But of course with bigger blocks it becomes less importand.

I think it has to do with the oprating system behaviour, more than with the USB-protocol itself.

Stefaan.