Forum Discussion
3 Replies
- Altera_Forum
Honored Contributor
I can only guess, which board and pin J4 you mean. Altera Cyclone III 3C120 Development Board? Signal HSMA_TX_D_P11 connected to FPGA pin J4?
All I/O pins are 3.3V tolerant, you should however keep the tolerated overshoot range for safe Cyclone III operation. - Altera_Forum
Honored Contributor
Yes, you can use 3.0V for security consideration instead of 3.3v, it may damage the cyc3.
- Altera_Forum
Honored Contributor
You can have damaging overshoots at 3.0V too, it's better to ensure that the cyc3 pins are well protected against overshoots (clamping diodes, and/or a buffer close to FPGA as an example) rather than just reduce the I/O voltage by 0.3V.