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Hi, could someone help me with the Cyclone II PCI devel kit?
The PCI Compiler IP generates time-limited evaluation only. This would be okay, but the PCI hosts/motherboards do not support hot-plug on the "ordinary" non-CardBus PCI slots. But a reset wipes the fpga configuration. So I would need instead to program the design into the non-volatile flash/PROM on the board. Correct?
The problem is that the PCI IP time-limited evaluation somehow prevents the "Convert Programming Files" tool from generating the required *.jif from the input *.sof. Is this intentional?
On the MaxII i could program the CPLD non-volatilely and run untethered for about an hour before the PCI stops.
How to program Cyclone II similarly?
TIA!
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Hi,
I think it is intentional that you could not generate other files. I don't understand that a reset ( do mean a PCI Reset ??) wipes out the FPGA programming. BTW: Where does the power of your FPGA board comes from ? You have to power-up your FPGA board independent from the PC. First power-up your FPGA board, programm the FPGA and start
your PC.
Kind regards
GPK
Honored Contributor
