Forum Discussion

milenko121175's avatar
milenko121175
Icon for New Contributor rankNew Contributor
3 years ago

Cyclone 10GX Reference Design - Cyclone10GX_PCIeGen2x4_DMA_18_0 fails during enumeration.

Hello, This post would seem to be near identical to: https://community.intel.com/t5/Programmable-Devices/Intel-pcie-gen-2x4-example-design-with-avlonmm-dma-reference/m-p/1472443 But I have verifie...
Fpga Devkit
hareesh's avatar
hareesh
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,

Thanks for contacting Intel. I'm assigned to support request.

I'll investigate and get back to you soon. Thanks for your patience.

Best regards,

Hareesh B.


  • milenko121175's avatar
    milenko121175
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hello Hareesh,

    As an update, I attempted to do Cyclone10GX_PCIeGen2x4_AVST_18_0.par today and it was successful in enumeration. I can't do much else since the DUT PC is a Linux box.

    I have also successfully followed Intel® Cyclone® 10 GX CvP Initialization over PCI Express User Guide and was successful in programming the file and then compiling the Linux driver to install the rbf file.

    I did do a factory reset when starting from Cyclone10GX_PCIeGen2x4_DMA_18_0 so I have confidence that the Evaluation board is working properly.

    This reference design is where I want to start from and Linux is a requirement, so a lot of the other reference designs can only get me so far in proving the board works. They do not have the Linux driver nor application environment I would like to start evaluation from.

    Please let me know if you need any more input from me. Hope to hear from you soon.

    Thanks,

    Mil