Cyclone 10 GX Development Kit USB3.1 Channel problem

Hi, As I mentioned we are plan to using the USB3.1 gen 2 IP core which will be provided by System Level Solutions (India) Pvt. Ltd. https://www.intel.cn/content/www/cn/zh/programmable/solutions/partners/partner-profile/system-level-solutions--inc-/ip/embedded-usb-3-1-gen-2-device-controller--eusb31sf-.html http://www.slscorp.com/ip-cores/communication/eusb-3-1-gen-2-device-controller-eusb31sf.html We download the demo project files from SLS, and get the message like the attached log file. We have tried the different orientation of the C to C and A to C cable, and different USB ports and different PCs/laptops, same result. With the instructions from the SLS engineer, we checked some testing point on the dev board, and confirmed that the control signal from FPGA are correct and the pin status of the driver chip are correct too. We have spent three weeks on the dev board, and tried any kind of options, after we get the board. And even recovering to factory default helps noting. We don’t have equipment to test the USB3.1 RX/TX channel. And looks the problem should be about the transceiver. We cannot find any board testing software about the USB3.1 port on INTEL website. That is why we ask help here. Hope you could help us, and make our project move forward as quick as possible.